Abstract: An ECG signal detection system based on an on-chip system field programmable gate array (SoC FPGA) was designed. The system realizes the pick-up and pre-processing of ECG signals through a pre-acquisition amplifier circuit with high input impedance, high common-mode rejection ratio and low noise. The A/D conversion, VGA display, Micro SD card data storage and ECG algorithm processing of ECG signals are completed through the hardware platform based on SoC FPGA and the embedded software development environment of the embedded Linux development environment. The ECG signal is analyzed by wavelet and QRS, which realizes the collection, display, storage and processing of ECG signals.
0 Preface
Electrocardiogram (ECG) can objectively reflect the physiological condition of various parts of the heart, and is also the main basis for the diagnosis of heart disease. Because of its easy detection and good intuitiveness, it is widely used in clinical medicine. Research and application [1, 2]. Since the first electrocardiograph was used in the clinic in 1906, various forms of ECG monitors have appeared. Traditional ECG detection instruments are mostly designed with single-chip microcomputer and PC as the core. The system is cumbersome and has a single detection method, which is not conducive to the improvement of system integration and miniaturization, or the inconvenience of the system [3]. Due to the rise of wearable devices and mobile medical care , ECG monitors are moving toward miniaturization, portability, and intelligence [4].
In this paper, an on-chip system field programmable gate array (SoC FPGA) ECG signal detection and processing system is designed. The ECG signal detection system is realized by A/D hybrid design and soft and hard co-design method. The signal acquisition is completed by the analog front-end circuit. It utilizes the advantages of SoC FPGA reconfigurability and soft and hard co-design. It performs software A/D conversion, VGA display, data storage and algorithm processing to realize signal acquisition, display and storage. ECG detection and processing system integrated with multi-functions such as processing.
1 ECG signal detection system design
The ECG signal detection and monitoring system is a hybrid system of analog and digital. It is mainly divided into surface ECG signal acquisition circuit and ECG signal digital processing system with SoC FPGA as the core. The acquisition circuit is connected to the medical lead wire to pick up the ECG signal through the patch electrode. The ECG signal is amplified by the acquisition circuit and simulated and filtered, and then enters the SoC FPGA, which is first controlled by the Linux-based application on the HPS-side ARM embedded hard core. A/D conversion, conversion to digital signal VGA display on the FPGA side, and digital signal transmission to the HPS end, the digital signal can be algorithmically processed and stored on the MicroSD card. SoC FPGA software and hardware collaboration development methods are extremely convenient for hardware design and software development for ECG signal follow-up algorithm processing. The overall architecture of the system is divided by functional modules as shown in Figure 1.
Figure 1 system block diagram
Fig 1 System block diagram
1.1 body surface ECG signal acquisition circuit
The normal ECG signal amplitude ranges from 10 μV to 5 mV, with a typical value of 1 mV and a frequency range of 0. 05 to 100 Hz, while the ECG signal is very sensitive to noise. Therefore, the ECG signal acquisition circuit needs to have high input impedance, high common mode rejection ratio, low noise and low drift. The surface electrocardiogram acquisition circuit is composed of a preamplifier circuit and a post amplifier circuit.
1.1.1 preamplifier circuit
The preamplifier circuit mainly performs preliminary amplification and denoising on the picked ECG signal to facilitate post-stage amplification and processing. The noise in the ECG signal mainly includes power frequency interference, myoelectric interference, baseline drift and high frequency noise.
1) Preamplifier circuit design
The preamplifier circuit is composed of a preamplifier circuit, a band pass filter circuit and a 50 Hz power frequency trap circuit. The preamplifier circuit further comprises an input protection circuit, a right leg drive circuit and an instrument operational amplifier amplifier circuit, as shown in the figure. 2 is shown.
Figure 2 preamplifier circuit
Fig 2 pre-amplifier circuit
Since the system needs to receive the body surface to collect signals, it is necessary to consider the problem of human body protection during the signal acquisition process. In the system, the transient voltage suppressors (TVS) diodes with high withstand voltage values ​​are selected at the input stage front end of the acquisition circuit. To protect the human body and the circuit. The right leg drive circuit is used to connect the reference electrode in the acquisition of the ECG signal, which can effectively eliminate the common mode interference in the acquired signal [5]. The instrumentation amplifying circuit completes the primary amplification of the ECG signal, while also having high input impedance, high common mode rejection ratio, low noise and low drift. For the sake of consideration, the AD8220 chip of the precision instrumentation op amp of ADI is selected. In order to prevent saturation distortion, the gain of the front stage is set to 20 times [6].
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